What is BS EN 61188-5-6 - Chip carriers with J-leads on four sides about?
BS EN 61188-5-6 is an international standard that focuses on attachment considerations and design methods for printed board assemblies.
BS EN 61188-5-6 provides information on land pattern geometries used for the surface attachment of electronic components with J-leads on four sides.
The intent of BS EN 61188-5-6 is the information presented herein is to provide the appropriate size, shape, and tolerances of surface mount land patterns to ensure sufficient area for the appropriate solder fillet, and also allow for inspection, testing, and reworking of those solder joints.
Who is BS EN 61188-5-6 - Chip carriers with J-leads on four sides for?
BS EN 61188-5-6 on attachment considerations and design methods for printed board assemblies are useful for:
- Manufacturers of printed circuit boards (PCBs)
- Manufacturers and suppliers of electronic components
- Designers of printed circuit boards (PCBs)
- Quality control and testing personnel
- Regulatory authorities
Why should you use BS EN 61188-5-6 - Chip carriers with J-leads on four sides?
The proposed land pattern dimensions in BS EN 61188-5-6 are based upon the fundamental tolerance calculation combined with the given land protrusions and courtyard excesses. The courtyard covers all issues about normal manufacturing needs.
The land pattern dimensions covered in BS EN 61188-5-6 are generally applicable for reflowed solder paste processes. For immersion soldering processes (e.g., wave, jet, drag soldering), lands may have to be modified to prevent shadowing and shorting (e.g., by extending land length parallel to the direction of motion of the board and/or provision of solder thieves).
BS EN 61188-5-6 offers a threefold land pattern dimensioning (levels 1, 2, and 3) based on a threefold set of land protrusions and courtyard excesses maximum (max.), median (mdn.), and minimum (min.). Each land pattern has been assigned an identification number to indicate the characteristics of the specific robustness of the land patterns. Users also have the opportunity to organize the information to suit their particular design.
BS EN 61188-5-6 informs users responsibility to verify the surface mounting devices (SMD) land patterns used for achieving an undisturbed mounting process, including testing, and ensured reliability for the product stress conditions when in use.
BS EN 61188-5-6 assumes that land dimensions are always larger than component termination or lead outlines. If a user has good reason to use solder resist to limit wetting on land, to use lands smaller than component terminations, or to apply a concept different from that of IEC 61188-5-1.