Behavioural languages - VHDL Analog and Mixed-Signal Extensions

Behavioural languages - VHDL Analog and Mixed-Signal Extensions

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12   Scope and visibility

12.1   Declarative region

With two exceptions, a declarative region is a portion of the text of the description. A single declarative region is formed by the text of each of the following:
  1. a) An entity declaration, together with a corresponding architecture body
  2. b) A configuration declaration
  3. c) A subprogram declaration, together with the corresponding subprogram body
  4. d) A package declaration together with the corresponding body (if any)
  5. e) A record type declaration
  6. f) A record nature declaration
  7. g) A component declaration
  8. h) A block statement
  9. i) A process statement
  10. j) A simultaneous procedural statement
  11. k) A loop statement
  12. l) A block configuration
  13. m) A component configuration
  14. n) A generate statement
  15. o) A protected type declaration, together with the corresponding body
In each of these cases, the declarative region is said to be associated with the corresponding declaration or statement. A declaration is said to occur immediately within a declarative region if this region is the innermost region that encloses the declaration, not counting the declarative region (if any) associated with the declaration itself.
Certain declarative regions include disjoint parts. Each declarative region is nevertheless considered as a (logically) continuous portion of the description text. Hence, if any rule defines a portion of text as the text that extends from some specific point of a declarative region to the end of this region, then this portion is the corresponding subset of the declarative region (thus, it does not include intermediate declarative items between the interface declaration and a corresponding body declaration).
In addition to the preceding declarative regions, there is a root declarative region, not associated with a portion of the text of the description, but encompassing any given primary unit. At the beginning of the analysis of a given primary unit, there are no declarations whose scopes (see 12.2) are within the root declarative region. Moreover, the root declarative region associated with any given secondary unit is the root declarative region of the corresponding primary unit.
There is also a library declarative region associated with each design library (see 13.2). Each library declarative region has within its scope declarations corresponding to each primary unit contained within the associated design library.

NOTE An architecture body, though a declaration, does not occur immediately within any declarative region.